However, P3 may see the change made by P1 after seeing the change made by P2 and hence return 10 on a read to S. If we ensure only write propagation, then P3 and P4 will certainly see the changes made to S by P1 and P2. Processor P1 changes the value of S (in its cached copy) to 10 following which processor P2 changes the value of S in its own cached copy to 20. To illustrate this better, consider the following example:Ī multi-processor system consists of four processors - P1, P2, P3 and P4, all containing cached copies of a shared variable S whose initial value is 0. However, they are not sufficient as they do not satisfy the Transaction Serialization condition. The above conditions satisfy the Write Propagation criteria required for cache coherence. If processor P1 reads the old value of X, even after the write by P2, we can say that the memory is incoherent. Propagating the writes to the shared memory location ensures that all the caches have a coherent view of the memory. This condition defines the concept of coherent view of memory. ![]() In a read made by a processor P1 to location X that follows a write by another processor P2 to X, with no other writes to X made by any processor occurring between the two accesses and with the read and write being sufficiently separated, X must always return the value written by P2.In a read made by a processor P to a location X that follows a write by the same processor P to X, with no writes to X by another processor occurring between the write and the read instructions made by P, X must always return the value written by P.The following conditions are necessary to achieve cache coherence: ![]() In a multiprocessor system, consider that more than one processor has cached a copy of the memory location X. One type of data occurring simultaneously in different cache memory is called cache coherence, or in some systems, global memory. DefinitionĬoherence defines the behavior of reads and writes to a single address location. However, in practice it is generally performed at the granularity of cache blocks. Theoretically, coherence can be performed at the load/store granularity. Transaction Serialization Reads/Writes to a single memory location must be seen by all processors in the same order. ![]() The following are the requirements for cache coherence: Write Propagation Changes to the data in any cache must be propagated to other copies (of that cache line) in the peer caches. Cache coherence is the discipline which ensures that the changes in the values of shared operands (data) are propagated throughout the system in a timely fashion. When one of the copies of data is changed, the other copies must reflect that change. In a shared memory multiprocessor system with a separate cache memory for each processor, it is possible to have many copies of shared data: one copy in the main memory and one in the local cache of each processor that requested it.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |